SLC, MLC, TLC and QLC: how bits per cell change an SSD

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SLC, MLC, TLC, and QLC are NAND flash cell types that store one, two, three, or four bits per cell. More bits per cell increase storage density and lower cost but reduce endurance and write speed. SSDs use firmware, overprovisioning, and SLC caching to balance these trade-offs.

Bits per cell: SLC to QLC

NAND flash memory stores data in cells that each hold a certain number of bits. A single-level cell (SLC) stores one bit, a multi-level cell (MLC) stores two bits, a triple-level cell (TLC) stores three bits, and a quad-level cell (QLC) stores four bits. Micron's NAND flash page describes SLC as intended for high-performance, mission-critical systems, MLC as a balance of performance and endurance for cost-sensitive applications, TLC as high-performance storage for PCs, data centers, and mobile devices, and QLC as the densest option.

The move from SLC toward higher-bit cells has been driven by the need for greater capacity and lower cost per gigabyte. KIOXIA's BiCS FLASH main page notes that KIOXIA has engineered the migration from SLC to MLC, then to TLC, and now to QLC, with each step offering different density and performance characteristics.

The price of extra bits

Increasing the bits per cell requires finer voltage distinctions. A quad-level cell must read and write 16 voltage levels, twice the number used by a triple-level cell. Solidigm's QLC considerations article explains that this leads to lower program/erase endurance and lower input/output speed for QLC NAND compared to TLC at the component level.

The trade-off is clear: more bits per cell yield higher density and lower cost, but at the expense of endurance and write performance. Consequently, the choice of cell type reflects the balance between capacity and endurance required by the application.

How SSD designs compensate

SSD controllers and firmware can reduce the endurance and speed penalties of high-bit cells. Overprovisioning, TRIM, and garbage collection help manage write amplification. SNIA's SSD overview states that endurance is affected by workload and free space, and that consumer SSDs often use an SLC cache in front of TLC or QLC media to deliver high burst performance.

For read-intensive workloads, QLC SSDs are engineered to provide high read bandwidth and low latency. Solidigm's QLC NVMe SSD brief explains that QLC drives can achieve the maximum bandwidth of the PCIe 4.0 interface for read operations and deliver read performance comparable to TLC models.

Advanced 3D NAND manufacturing techniques also address density. KIOXIA's CMOS directly Bonded to Array (CBA) and On Pitch Select Gate (OPS) technologies eliminate dummy areas and allow more cells in the same space. KIOXIA's BiCS FLASH technology page describes how these front-end processes improve bit density and NAND I/O speed.

Choosing the right cell type

The decision among SLC, MLC, TLC, and QLC centers on the desired balance of capacity, endurance, and cost. SLC serves applications that demand maximum write endurance, such as enterprise caching. MLC and TLC fit general-purpose storage where capacity and cost matter more than absolute endurance. QLC suits read-heavy storage that needs high capacity at the lowest possible cost per gigabyte.

In practice, TLC and QLC dominate the SSD market because they offer the best cost per bit, while SLC and MLC remain niche choices for specific workloads.

Progression of NAND cell typesStep 1: SLC: one bit per cell; Step 2: MLC: two bits per cell; Step 3: TLC: three bits per cell; Step 4: QLC: four bits per cellProgression of NAND cell typesSLC: one bit per cellMLC: two bits per cellTLC: three bits per cellQLC: four bits per cell
Progression of NAND cell types
NAND cell types compared
TypeBits per cellRelative enduranceTypical use
SLC1HighestMission-critical systems
MLC2HighCost-sensitive applications
TLC3ModeratePCs, data centers
QLC4LowestRead-intensive, high-capacity storage

Frequently asked questions

What does SLC stand for?

SLC stands for single-level cell, meaning each NAND flash cell stores one bit.

Why does QLC have lower endurance than TLC?

QLC must distinguish 16 voltage levels, twice as many as TLC, which reduces its program/erase endurance and write speed.

How do SSDs compensate for QLC's lower endurance?

SSDs use overprovisioning, TRIM, and SLC caching to manage writes and extend drive life.

Which NAND type is best for read-intensive workloads?

QLC is well suited to read-intensive workloads because it offers high read bandwidth, low latency, and high capacity.

Can a NAND cell store more than four bits?

Yes, a cell can store five bits, known as PLC, but it is not yet commonly used in SSDs.